Testing the Z80 Chip with a 1970s Beauty

I worked at Fairchild Sentry DTS in San Jose (at that time very close to the airport) circa 1984-1986 on the series 50 ATE. It was a beast. At the time it could clock & test up to 50MHz (hence the '50'). It was pretty much all ECL which would get very hot. Each unit shipped with a DEC VAX - that was my intro to VMS which had some interesting features like file versioning. I worked as a tech on the production floor building the 50. It was just being introduced and there were so many problems with getting them up and running. The systems had to be calibrated and that was done by changing the lengths of hundreds of delay wires on the backplane (in addition to digital delay-lines in the test head that could be automatically calibrated (over several hours) with the delay values being stored on disk). No two systems were exactly the same because of this (I'm sure this was also an issue with earlier ATE models as well). IIRC the 50 was "introduced" (announced) in '84 shortly before the time I started. I recall that we were way behind in producing them and there was lots of blame flying between production (us) and engineering - as in maybe they designed something that wasn't easily reproducible.

In my next job I moved into an engineering role and I always kept that experience as a technician in the back of my mind: make sure what you're designing can be built with reproducible results.

> We had to be careful about those AC utility jacks. The tester ground was at -11 volts at several hundred amps. If you clipped a scope to a ground, it would happily melt the insulation off the scope probe until it stunk up the room and pooled on the floor. We had to use a three-prong adapter with the ground cut off.

You don't get this kind of excitement anymore with modern electronics.

From the neighbouring: https://mtsi.substack.com/p/we-picked-apart-the-milestone-hp

> I found out many years later that Mostek had put in special mask “cheats” to prevent people from copying our chip. Mostek co-founder and chief designer Robert Proebsting had discovered a way to put a pad on top of a silicon hill, but without connecting it to the obvious trace below. A copier would be unable to see this hill that served as an insulator unless they used a side-viewing microscope, which was rarely used. Copying was almost always done with a top-illuminated microscope.

> That would throw off a copier who’d think it was just an ordinary via, and connect the trace to the layer below. This chip had a circuit to signal the specific 2+3 operation, and this would then be connected by the wrongly copied pad to the reset pin of the chip.

Typo? "ZIP DIP socket" should be "ZIF DIP socket", as in Zero Insertion Force?

I built something like a simpler version of this for testing some edge cases of the 6502. You can play with it through a browser here: https://chiplab.emulationonline.com/6502/

> ZIP DIP socket If that is referring to the picture above, my recollection is that it's a ZIF DIP socket ... We used those for writing [E][E]PROM. ZIF was zero-insertion-force.

Re the Z80 chip: I recall seeing a picture of a feller laying out the tracks with a roll of sticky tape on a drafting board.

>If you used a Z80 chip back in the 1980s, it almost certainly passed through a single room and its Fairchild Sentry 610 test system.

I live in Eastern Europe, so I got access to a Z80 in the '90s, not '80s. And it was a clone, so it wasn't tested at Fairchild , if it was ever tested.

Reminded me of http://collapseos.org/

First thing I made with Arduino was a tester for (much less complex) 54xx and 74xx chips.

Does anyone know what the tester for a 12-core 3 GHz processor looks like now?

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